Apple • Cupertino, CA 95015
Job #2670612859
Emulation Verification Engineer
Santa Clara Valley (Cupertino),California,United States
Hardware
Imagine what you could do at Apple! New ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish! Dynamic, inquisitive people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same passion for innovation that goes into our products also applies to our practices strengthening our commitment to leave the world better than we found it. We have a critical impact on getting high quality functional products to millions of customers quickly. We are looking for you to join our emulation team focusing on the creation, deployment, and support of sophisticated emulation environments, while being at the center of a chip design effort collaborating with multiple fields Are you ready to help us deliver the next groundbreaking Apple products?
Key Qualifications
Proven experience with bring up, debugging and verification in Emulation
Understanding of the tool flow from RTL to Emulation is a big plus
Good understanding of any Standard Emulator (Palladium, Veloce, Zebu) or FPGA (Xilinx, Altera) flow
Proven design verification skills
Experience in writing Synthesizable SystemVerilog/Verilog code and SystemVerilog assertions
Experience with System Verilog verification environments including C/C++ DPI, UVM
Experience on any Scripting (Perl/Python/TCL)
Excellent analytical and debug skills
Excellent oral and written English skills
Experience in UVM Acceleration is plus
Description
As a member of the Emulation Verification team, you will play a key role using Emulation for verification of mixed signal SoCs, which have large digital and analog sections. You will be responsible for porting the design to the Emulation platform with the help of the Emulation team and then driving the verification plan. Core responsibilities will include: - Bringing up the emulation platform for mixed signal SoCs - Developing monitors and checkers for Emulation platform and come up with the latest techniques to achieve better performance - Preparing and driving the test plan and performing reviews with multi-functional teams - Collaborating cross-functionally with Design, Architecture, Power, Silicon Validation, Performance and SW Teams - Developing code for Design and verification that aids with emulation activities, using Verilog/System Verilog/UVM
Education & Experience
Bachelor's Degree required.
Additional Requirements
Pay & Benefits
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